Silicon integrated circuits typically electrically isolate individual field effect transistors, bipolar transistors, and any substrate resistors and other elements with silicon dioxide ("oxide") regions at the surface of a silicon wafer. These oxide isolation regions can be directly formed by a thermal oxidation of a silicon wafer with an oxidation barrier such as silicon nitride ("nitride") masking off areas which will eventually contain transistors, substrate resistors, and other elements. This method of oxidation of selected regions of a silicon wafer has acquired the acronym LOCOS ("local oxidation of silicon").
Typical LOCOS includes using a thin oxide layer between the nitride mask and the silicon wafer to provide stress relief during thermal oxidation. However, thermal oxidation of silicon proceeds essentially isotropically, and the oxidation encroaches under the nitride mask along the pad oxide to form an oxide wedge. FIGS. 1-2 illustrate LOCOS with nitride mask 102 on pad oxide 104 which is on silicon wafer 106. FIG. 1 is prior to thermal oxidation and FIG. 2 is after thermal oxidation, which forms isolation oxide 110. As shown, wedges 110 warp nitride 102 and may generate defects in the adjacent silicon wafer due to the stresses generated.
The stripping of silicon nitride mask material after the local oxidation of silicon is a possible source of damage to the pad oxide and/or the underlying device area silicon. For example, the pad oxide can suffer degradation during an over-etch or etchants can reach the underlying silicon substrate through imperfections in the pad oxide. Using current etch techniques, etching of silicon occurs at a significant rate and the result can be craters in the substrate, which are referred to as "pitting".
Removal of the nitride mask 102 after LOCOS thermal oxidation requires a nitride etch which will stop on the pad oxide and thereby avoid damaging the underlying device area silicon. The standard nitride etch uses a bath of hot phosphoric acid (H.sub.3 PO.sub.4) which is highly selective to oxide. However, wet etches introduce undesired contamination of a wafer for two reasons: liquids typically cannot be purified sufficiently and the wafer must be removed from the oxidation chamber for the wet nitride stripping (plus pad oxide removal and cleanup) and then reinserted into the process chamber for subsequent steps, typically a thermal oxidation to form gate oxide. An all dry processing sequence for nitride stripping can avoid the wet etch and the removal/reinsertion contamination sources.
Nitride can also be used in other integrated circuit processing steps which subsequently require isotropic stripping. For example, a wafer with a nitride backside seal and a frontside deposited protective oxide may require a selective nitride strip to avoid disturbing the frontside oxide.
Current dry etch processes used for the nitride stripping step have the undesired effect of a significantly higher etch rate of silicon if the etchants reach the underlying substrate. For example, reference Kastenmeier et al. "Chemical Dry Etching of Silicon Nitride and Silicon Dioxide Using CF.sub.4 /O.sub.2 /N.sub.2 Gas Mixtures," J. Vac. Sci. Technol. A 14(5), pp. 2802-2813 (1996). This article discloses that the silicon nitride etch rate in a chemical dry etch increases by a factor of two as oxygen is added to a CF.sub.4 microwave discharge. The addition of N.sub.2 to a CF.sub.4 /O.sub.2 plasma increases the etch rate by an additional factor of seven. Both oxygen and nitrogen are thus found to be necessary to enhance the etch rate significantly. However, the article assumes a regime where fluorine atoms are available in abundance, and the process described again comprises a process wherein etching of exposed silicon occurs much faster than etching of nitride. For example, reference Matsuo et al. "Role of N.sub.2 Addition on CF.sub.4 /O.sub.2 Remote Plasma Chemical Dry Etching of Polycrystalline Silicon," J. Vac. Sci. Technol. A 15(4), pp. 1801-1813 (1997). This article discloses that the silicon etch rate (under conditions presented for the silicon nitride etch above) is a factor 10-15 higher than that of silicon nitride.
There thus exists a need in the art for a chemical dry etch process for highly selective etching of silicon nitride over both silicon and silicon dioxide. The present invention provides such a process.